In power electronic devices to CVCF power inverter as the core of UPS has been widely applied , its output waveform major
technical requirements include low steady-state total harmonic distortion (THD)
and fast dynamic response , since non- linear load , PWM modulation process
dead and inverter system itself weakly damped and other factors, using the
general closed-loop PWM control is not ideal. In this paper, the United States
produced by TI TMS320F240DSP for the control chip, using repetitive control
system to improve steady-state performance with the introduction of integral
control pole configuration to improve the dynamic characteristics of the system
, the experimental results show that the scheme can simultaneously achieve high
quality of homeostasis and dynamic characteristics.
Repeat controller design
The basic idea of repetitive control from control theory internal model principle ,
that if you want the control system of a reference instruction to achieve no
static error tracking , then the instruction that generated the reference model
must be included in the stable closed-loop control system internally.
P (z) is the inverter input and output of
the discrete transfer function , is the system control object. Inverter
switching frequency than the natural frequency of the LC filter is much higher
, the dynamic characteristics determined primarily by the LC filter , obtained
by establishing state equation P (z). In this system , L = 0.88mH, C = 60μF,
inductor series resistance of 0.4Ω, the switching frequency and the sampling
frequency is 10KHz, deduced discrete transfer function is:
Notch filter S1 (z) is mainly used for
cancellation of the dc to ac power inverter resonant peak , a second order filter S2 (z)
mainly provides high frequency attenuation. Zk links lead compensation filter S
(z) and the control target P (z) the total phase lag , Kr is a duplicate
control gain . Compensator C (z) to achieve the purpose of the object to the
corrected low frequency gain close to 1 , as soon as the high frequency gain is
reduced to -26dB or less, and the system in the low frequency band prior to the
passage of the total phase shift as small as possible . Take Kr = 0.9, zk = z5,
to C (z) P (z) of the Bode diagram in Figure 3 , can be designed to meet that
requirement.
Prior to the passage on the concatenation
of the control cycle latency links zN action delayed one cycle , which is the
period of the detected error information in the next cycle began to affect the
amount of control . Aspects of the introduction of cycle delay is mainly due to
the system contains advanced aspects zk, if this system is to be able to
physically realize , there must be a delay links pole placement
Repeat inverter control effectively improve
steady-state performance , but poor dynamic response . In fact, the natural
dynamic characteristics of the inverter good reason
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